TSMC beat on Q3 2026 revenue, profit and Q4 guidance, but the read-through for GPU stocks is in the mix: 2nm at 8% of revenue confirms AMD's MI450 ramp, HPC up 22% confirms Nvidia's demand, and CoWoS capacity stays unquantified.
TSMC's Q3 2026 results (October 15, 2026) beat on revenue, profit and guidance. This article covers what the print means for Nvidia and AMD; the full TSMC results are covered separately.
The new information is in the mix. 2nm went from 3% of wafer revenue in Q2 to 8% in Q3, and HPC reached 68% of revenue, up 22% quarter over quarter. Gross margin was 66.4%, down 1.3 points from Q2, which TSMC attributes to the initial 2nm ramp.
On the call, TSMC guided Q4 revenue to US$52.3–54.3 billion (up 58% year over year at the midpoint), raised its 2026 growth outlook to around 44%, said AI demand is "higher than the supply," and said 2nm capacity will more than double by 2027. It gave no CoWoS capacity figure.
For Nvidia (NVDA): demand confirmed, packaging supply still unquantified. For AMD: the 2nm ramp and the 2027 capacity doubling are the first third-party confirmation of its MI450 node. Both stocks fell on October 15 anyway, on a sector-wide sell-off over AI capex returns, not on TSMC's numbers.
TSMC manufactures every data-center GPU Nvidia and AMD sell, and it also does the advanced packaging (CoWoS) that joins those GPUs to high-bandwidth memory. Neither company has a second source at the leading edge. So TSMC's volumes, margins and node mix are the earliest hard data on how much AI silicon is actually being built for the next two to four quarters.
From the
3Q26 management report: revenue of US$46.72 billion, above the US$44.6–45.8 billion guidance; net income of NT$763.06 billion, up 68.7% year over year and ahead of consensus; gross margin of 66.4%, operating margin of 58.7%; quarterly capex of US$13.84 billion. Full results, segment tables and the margin walk are in TSMC Q3 2026 Earnings: Profit Jumps 69%, Revenue Beats Guidance as 2nm Production Expands. The rest of this article is about what those numbers mean for two of TSMC's customers.
Two mix figures in the report matter more to GPU investors than the beat itself: 2nm rose to 8% of wafer revenue from 3% in Q2, and the HPC platform reached 68% of revenue, up 22% quarter over quarter.
The 2nm figure is an AMD data point. AMD is the large AI customer on the node this year, with EPYC Venice in volume production and the MI450 series entering production in Q3, so a 3%-to-8% jump in one quarter is the first third-party evidence that AMD's node is ramping at volume rather than in pilot quantities. Nvidia's current Rubin generation is on 3nm-class process, so the 2nm number says little about Nvidia's 2026 supply either way.
The HPC figure is a Nvidia data point first, because Nvidia is the largest single contributor to that platform. HPC growing 22% quarter over quarter while total revenue grew 16% in US dollar terms means the AI-heavy segment is still taking share inside TSMC, which is the demand confirmation Nvidia needs ahead of its own November report. The caveat stands: HPC also includes PC and conventional server silicon, so "HPC up 22%" is a proxy for AI demand, not a measurement of it.
The one negative in the print also splits by customer: the 1.3-point gross margin decline came from the early 2nm ramp, so it sits on AMD's node, not Nvidia's.
On the October 15 call, CFO Wendell Huang guided Q4 2026 revenue to US$52.3–54.3 billion, a 14% sequential and 58% year-over-year increase at the midpoint, with gross margin of 65–67% and operating margin of 56.5–58.5%, according to the
earnings call transcript. CEO C.C. Wei raised the full-year 2026 growth outlook to around 44% in US dollar terms, from the "slightly above 40%" given in July. The margin midpoint of 66% is 40 basis points below Q3, which management again attributed to the 2nm ramp.
Three statements on the call matter more to GPU investors than the ranges. Wei said AI demand "is higher than the supply" and that TSMC is working to narrow the gap. He said 2nm family capacity is expected to more than double by 2027. And when asked about the AI accelerator revenue growth target of a mid-to-high-50s percent CAGR through 2029, he said it "probably will be higher." What the call did not give was a CoWoS capacity number; Wei said only that CoWoS "is still the number one choice for our customers" and that TSMC is in production of 5x-reticle packages while working toward 9x and 14x.
The 2026 capex budget of US$60–64 billion was reiterated, not raised; with US$40.64 billion spent through September, Q4 alone implies roughly US$19–23 billion. Huang added that 2026–2028 capex will be "even more significantly higher than the past three years."
For Nvidia, the Q3 numbers settle demand and leave supply open. HPC up 22% confirms accelerator volume still rising into year-end, and the 66.4% gross margin shows TSMC holding pricing on the 3nm-class nodes Nvidia uses for Rubin.
The open item is packaging, and the call left it open. Nvidia's 2026–27 unit volume is set by CoWoS supply more than by wafer supply, and management gave no CoWoS capacity figure, only that demand exceeds supply and that larger reticle sizes are in production. "Demand higher than supply" is good for Nvidia's pricing and bad for its unit ceiling at the same time; which effect dominates depends on numbers TSMC did not disclose.
Net read: supportive on demand, unresolved on supply. The Q4 guide of 58% year-over-year growth and the comment that the AI accelerator CAGR will probably exceed the high-50s are the strongest demand statements TSMC has made this year, and the 2nm margin dilution is not Nvidia's cost to bear this cycle. NVDA still closed down 1.84% on October 15, alongside TSM at −1.80%, in a sector-wide sell-off tied to doubts about returns on AI capital spending rather than to anything in TSMC's report. Nvidia's own numbers follow through
NVIDIA investor relations in November.
AMD is the company most exposed to the 2nm line in this report. AMD has said EPYC Venice is in volume production on 2nm and that the MI450 series entered production at TSMC in Q3 2026, with volume shipments planned for 2027, per
AMD's investor relations materials. The jump in 2nm revenue share to 8% is the first third-party confirmation that the node AMD bet its next accelerator generation on is actually shipping in volume.
The margin dilution establishes that TSMC is prioritizing the ramp over quarterly margin, which is what a customer waiting on 2nm capacity wants to see; whether any of that cost reaches AMD's wafer pricing is a contract matter neither company discloses.
The call added the forward piece: 2nm capacity is expected to more than double by 2027, which is the year AMD has said MI450 volume shipments begin. That is as close as TSMC comes to confirming a customer's roadmap without naming the customer.
Net read: positive on execution, with the same open question on packaging allocation. Because AMD's share of CoWoS is small relative to Nvidia's, the absence of a CoWoS capacity number on the call leaves AMD's 2027 unit plan more exposed, in percentage terms, than Nvidia's. AMD shares had already fallen 5.7% on October 14 and stayed under pressure on October 15, part of the same AI-capex sell-off that hit NVDA and TSM, not a reaction to the 2nm data.
[MEXC analyst name], [role] at MEXC, puts it this way: "The headline beat was priced in a week ago. The 2nm share going to 8% was not. That is an AMD data point first and a TSMC data point second."
One reading note on the October 15 price action: TSMC's beat, guide and demand commentary were all positive, and NVDA, AMD and TSM fell anyway. When a supplier's print is strong and the customers' stocks drop, the driver is usually the macro or sector narrative, here the question of whether hyperscalers earn a return on AI spending, rather than the fundamentals in the report. That distinction matters for anyone sizing a position off this read-through.
Supportive on demand, unresolved on supply. HPC revenue up 22% quarter over quarter, Q4 guidance of 58% year-over-year growth and management's statement that AI demand exceeds supply all confirm the nodes Nvidia uses are full. The variable that sets Nvidia's 2026–27 unit volume, CoWoS packaging capacity, was not quantified on the call.
AMD's MI450 accelerators and EPYC Venice CPUs are built on TSMC's 2nm node; Nvidia's current Rubin generation is on 3nm-class process. 2nm rising from 3% to 8% of TSMC's wafer revenue therefore confirms AMD's supply ramp directly, while the margin dilution from that ramp sits on AMD's node rather than Nvidia's.
Not one-for-one. HPC includes data-center GPUs and AI ASICs but also PC and conventional server chips. HPC at 68% of revenue and up 22% quarter over quarter is the best available proxy for AI demand, not a direct measurement of it.
The October 15 declines (NVDA −1.84%, TSM −1.80%, AMD under pressure after a 5.7% drop the prior day) came from a sector-wide sell-off over whether AI capital spending will earn adequate returns, not from TSMC's numbers, which beat on revenue, profit and guidance.
Revenue of US$52.3–54.3 billion, gross margin of 65–67% and operating margin of 56.5–58.5%, with full-year 2026 growth now expected at around 44% in US dollar terms and the 2026 capex budget held at US$60–64 billion.
AMD reports in early November 2026 and Nvidia's fiscal quarter closes in late October with results in November. TSMC's October 15 report is the earliest supply-side read on both quarters.